03.04. Department of Computer Engineering

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OrgUnit's Researchers publications
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Author:  Belli, Fevzi
Author:  Ayav, Tolga
Date Issued:  [2010 TO 2019]
Subject:  Timed automata
Type:  Conference Object
Subject:  Program transformation

Results 1-1 of 1 (Search time: 0.002 seconds).

Issue DateTitleAuthor(s)
1Jul-2010Towards test case generation for synthesizable VHDL programs using model checkerAyav, Tolga ; Tuğlular, Tuğkan ; Belli, Fevzi