03.04. Department of Computer Engineering
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| Issue Date | Title | Author(s) | |
|---|---|---|---|
| 1 | Sep-2015 | Model based testing of VHDL programs | Ayav, Tolga ; Tuğlular, Tuğkan ; Belli, Fevzi |
| 2 | Jul-2010 | Towards test case generation for synthesizable VHDL programs using model checker | Ayav, Tolga ; Tuğlular, Tuğkan ; Belli, Fevzi |
| 3 | 2-Dec-2016 | Transforming VHDL to timed automata | Ayav, Tolga ; Tuğlular, Tuğkan ; Belli, Fevzi |
| 4 | 2010 | Utilization of timed automata as a verification tool for security protocols | Koltuksuz, Ahmet ; Külahçıoğlu, Burcu; Özkan, Murat |